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TMS320C5515
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5.12.1
I2C Peripheral Register Descriptions
SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
Table 5-26 shows the Inter-Integrated Circuit (I2C) registers.
Table 5-26. Inter-Integrated Circuit (I2C) Registers
HEX ADDRESS
RANGE
1A00h
1A04h
1A08h
1A0Ch
1A10h
1A14h
1A18h
1A1Ch
1A20h
1A24h
1A28h
1A2Ch
1A30h
1A34h
1A38h
ACRONYM
ICOAR
ICIMR
ICSTR
ICCLKL
ICCLKH
ICCNT
ICDRR
ICSAR
ICDXR
ICMDR
ICIVR
ICEMDR
ICPSC
ICPID1
ICPID2
REGISTER NAME
I2C Own Address Register
I2C Interrupt Mask Register
I2C Interrupt Status Register
I2C Clock Low-Time Divider Register
I2C Clock High-Time Divider Register
I2C Data Count Register
I2C Data Receive Register
I2C Slave Address Register
I2C Data Transmit Register
I2C Mode Register
I2C Interrupt Vector Register
I2C Extended Mode Register
I2C Prescaler Register
I2C Peripheral Identification Register 1
I2C Peripheral Identification Register 2
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Peripheral Information and Electrical Specifications
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